1. Field of the Invention
Generally, the present disclosure relates to the field of integrated circuits and, more particularly, to integrated circuits wherein semiconductor-on-insulator techniques are employed.
2. Description of the Related Art
Integrated circuits typically include a large number of circuit elements, which include, in particular, field effect transistors. In a field effect transistor, a gate electrode may be separated from a channel region by a gate insulation layer that provides an electrical insulation between the gate electrode and the channel region. Adjacent the channel region, a source region and a drain region are provided.
The channel region, the source region and the drain region are formed in a semiconductor material, wherein the doping of the channel region is different from the doping of the source region and the drain region. Depending on an electric voltage applied to the gate electrode, the field effect transistor may be switched between an on-state and an off-state.
For improving the performance of integrated circuits including field effect transistors, it has been proposed to employ semiconductor-on-insulator technology. In semiconductor-on-insulator technology, the source, channel and drain regions of transistors are formed in a thin layer of a semiconductor material, for example, silicon. The thin layer of semiconductor material may be provided above a substrate of a semiconductor material, for example, silicon, and may be separated from the substrate by an electrically insulating material, for example, silicon dioxide. Compared to integrated circuits wherein field effect transistors are formed on a bulk semiconductor substrate, semiconductor-on-insulator technology may allow reducing parasitic capacitances and leakage currents and a sensitivity of integrated circuits with respect to ionizing radiation.
However, semiconductor-on-insulator technology has some specific issues associated therewith, which include the so-called floating body effect. The body of a semiconductor-on-insulator field effect transistor forms a capacitor with the substrate. On this capacitor, electric charge may accumulate and cause adverse effects, including a dependence of the threshold voltage of the field effect transistor on its previous states and a reduced controllability of the channel.
US 2011/0291196 A1 discloses a semiconductor device that includes a FinFET or tri-gate transistor on the basis of a semiconductor-on-insulator substrate. The semiconductor device includes a silicon substrate, above which is formed a buried insulation layer, typically in the form of a silicon dioxide material. Furthermore, a plurality of semiconductor fins are provided and represent the “residues” of a silicon layer initially formed on the buried insulating layer. The fins include a source region, a drain region and a channel region. The extension of the channel region along the length direction of the fins is determined by a gate electrode structure including an electrode material, such as polysilicon, and a spacer structure. A gate dielectric material separates the electrode material from the semiconductor material of the channel region at the sidewalls of the fins and, in the case of a tri-Gate transistor, on the top surface of the fins.
Compared to planar field effect transistors, transistors wherein the channel region is formed in fins may have an improved controllability of the channel. However, for some applications, for example for forming transistors in integrated circuits according to the 22 nm technology node and beyond, it may be desirable to provide still further improvements of the controllability of the channel of a transistor.
The present disclosure provides a semiconductor structure including a transistor having an improved controllability of the channel and a method for forming such a transistor.